1. Field of Invention
The present invention generally relates to a serial data communication protocol method and circuit, and more particularly, to a communication protocol method and circuit for bi-directional serial data communication with one wire.
2. Description of Related Art
Data communication method is categorized as serial data communication and parallel data communication. The serial data communication includes the techniques of I2C bus, UART (Universal Asynchronous Receiver Transmitter) and HDQ16 protocol, etc.
FIG. 1 schematically shows a configuration diagram of a conventional I2C bus. As shown in FIG. 1, each device on I2C bus uses SDA (Serial Data Line) 102 and SCL (Serial Clock Line) 104 to transmit data. Data is transmitted uni-directionally with a format of 8 bits serial type on I2C bus. Data also can be transmitted on I2C bus di-directionally, and the standard data transmission rate is 100 kbit/s, although it can be improved to transfer data with a rate of 400 kbit/s.
Transmitting data on the I2C bus is widely accepted currently. FIG. 2, that schematically shows a data transmitting timing diagram of the I2C bus, is used for brief description hereinafter. It is assumed that the Micro-Controller A 106 in FIG. 1 intends to transmit data to the Micro-Controller B 108, and the Micro-Controller A 106 prepares sending data to SDA 102 in interval I of FIG. 2. However, since SCL 104 is in a low level state, the Micro-Controller B 108 will not receive any data from SDA 102. SCL 104 is in a high level state in interval II, in which the Micro-Controller B 108 receives data sent out from Micro-Controller A 106 on SDA 102. Then, SCL 104 turns back to the low level state again in interval III, in which the Micro-Controller B 108 does not receive any data from SDA 102, and the Micro-Controller A releases the usage right of the SDA 102 and the SCL 104.
FIG. 3 schematically shows a block diagram of a conventional UART configuration. FIG. 3 is a partial structure of a whole computer system, and the chip number 8251 (made by Intel is used as the configuration of the UART communication. When the computer intends to sen data to an external peripheral device (not shown), before the transmit buffer 302 sends seri data to the external peripheral device (not shown), the transmit controller 304 performs a confirmation operation with the external peripheral device (not shown) via the TXRDY, TXE, and {overscore (TXC)}
signal lines, so as to confirm whether the external peripheral device (not shown) is ready to receive data or not. Once the external peripheral device (not shown) is ready to receive data the serial data is sent to the external peripheral device (not shown) via the transmission line TXD of the transmit buffer 302, so that the computer can complete the operation of sending data to the external peripheral device (not shown).
Similarly, when the computer intends to receive data from an external peripheral device (not shown), before the receive buffer 306 receives serial data from the external peripheral device (not shown), the receive controller 308 performs a confirmation operation with the external peripheral device (not shown) via the RXRDY, SYNDET/DB, and {overscore (RXC)}
signal lines, so as to confirm whether the external peripheral device (not shown) is ready to send data or not. Once the external peripheral device (not shown) is ready to send data, the serial data is received from the external peripheral device (not shown) via the transmission line RXD of the receive buffer 306, so that the computer can complete the operation of receiving data from the external peripheral device (not shown).
FIG. 4A schematically shows a transmitting timing diagram of a conventional UART configuration. As shown in FIG. 4A, when the computer intends to send data to the external peripheral device, the TXE signal line is in a low level state, and the serial data DATA CHAR1, DATA CHAR2 and DATA CHAR3 are sent to the external peripheral device via the transmission line TXD. While when the TXE signal line is in a high level state, the transmission line TXD stops transmitting the serial data.
Similarly, as shown in FIG. 4, which schematically shows a receiving timing diagram of a conventional UART configuration, whether the computer intends to receive data from the external peripheral device or not is determined based on the status of the BD and RXRDY, and the serial data DATA CHAR1, DATA CHAR2 and DATA CHAR3 are received from the external peripheral device via the receiving line RXD.
In summary, if I2C bus serial communication method having a standard data transmission rate 100 kbit/s and a high speed data transmission rate 400 kbit/s is used to transmit data, it takes a long transmission time for transmitting the great amount of data that is needed for the current environment. Besides, The I2C bus needs two data transmission lines to perform the bi-directional data transmission, which makes it a complicated configuration. If the UART serial communication method is used to perform the bi-directional data transmission, two data lines are still needed and the circuit designed by using UART as the communication configuration is also quite complicated.